I'm really disappointed about how shallow the discussions about Adapteva are, and have been, on HN.
To remind everyone, the H = hacker. This device is a godsend, as far as I'm concerned. For the first time ever I get fully documented access to compute array on chip. No the architecture wasn't designed for anything specific, like graphics, but that means I don't get bogged down in details I don't care about, like some obscure memory hierarchy.
The chip is plain, simple, low-power, and begging for people to have an imagination again. Stop asking what existing things you can do with it, ask what future things having something like this on a SoC would enable.
Also, you should really be thinking about the chip at the instruction level, writing toy DSL to asm compilers. Thinking along the lines of, oh yeah I'll use OpenCL so I can be hardware agnostic, is never going to allow you to see what can be possible with it. If you read the docs you'll see what a simple and regular design it is, perfect for writing your own simple tooling.
It's been a long time, but I feel like a kid again. Like when I first discovered assembly on my 8086. Finally a simple device I can tinker with, play, and wring performance out of.
This is exactly my take on the Parallella board, and it's the exact reason why I donated to the Kickstarter back in the Fall.
I want to try my hand at writing a real, efficient, many:many message-passing API on top of SHM. It's something I've been interested in for a while (and am doing in an a side project for x86_64). Not because it hasn't been done a thousand times before, but because it's neat.
I want to write a compiler for the Parallella. Not because there aren't compilers already, but because I've never written a compiler that targets a RISC architecture before. I've never written a compiler that respects pipelining.
I want to write a parallelized FFT based on the original paper for the Parallela. I've used various FFT libraries before, but never actually implemented an FFT straight up. Why? Not because it's never been done before, but just because it's an idea that appeals to me. And for practice parallelizing algorithms . . .
I want to write a raytracer for the Parallella. Not because I haven't written a raytracer before, but because I think that I'll be able to do something interesting with a Parallella raytracer that I haven't done before: real-time (ish) raytracing. Not because that hasn't been done before, but because it'd be neat to build.
I want to build a distributed physics engine. Not because there aren't excellent open-source physics engines (Bullet, ODE, etc.) -- but because I find the problem interesting. It's something I've wanted to do for a while, but never got around to. Why? Because it's interesting.
I could go on, but I'll stop here. The Parallella, I think, is a catalyst for a lot of small projects that I've wanted to do for a while. The Parallella is my excuse to spend time on random projects that will never go anywhere beyond a page on my website describing what they are, plus a link to the source code.
And, you know what? That seems perfect to me. That's why I want a Parallella, and that's why I'm eagerly awaiting mine within the next month or three. (Hopefully!)
Sounds cool, but worth pointing out that the Parallela is Zynq based, and so comes with a Xilinx FPGA built into the SoC that includes the dual ARM cores. The FPGA provides the "glue" for the Epiphany chip to talk to the CPU, but there's plenty of spare capacity.
The more the merrier, though. I wish I had time to play with FPGA's - I have a Minimig (Amiga reimplementation where the custom chips are all in an FPGA) and I'm on the list for an FPGA Replay (targeting FPGA reimplementation of assorted home computers including the Amiga, and arcade machines in an FPGA).
Well stated. When I got an OLPC the point wasn't that it was a "good" laptop, it was that it was a "documented" laptop and that is rare indeed. What I find particularly amusing are the comments on things like the Raspberry Pi (and Parallela) which talk about all the things they do with "real" computers that these things cannot do. Its amusing because when the first 8 bit machines, the Mark-8 the Altair 8800, and the KIM-1 came out the exact same criticisms were leveled against them from the the same sorts of people. People who were using the existing infrastructure (mini-computers at the time of the Altair) whining that you couldn't run multi-user, you had no storage to speak of, you probably couldn't even assemble a program much less compile one on them, etc etc etc. The Apple II got huge amounts of disrespect from the establishment as a "baby's toy" or a kids toy designed to look like a computer. Then Visicalc hit and those voices faded.
Not enough people understand what is and what isn't possible in a parallel computer setup. Creating a really really simple setup is a great way to let them get their heads around it without getting the information overload shutdown.
"...I'll use OpenCL so I can be hardware agnostic..."
Woah now...
Using OpenCL is imminently sensible for a large swath of applications. And "Hardware Agnosticism" is beneficial for a large number of reasons. This is only the first "accessible" platform that has been released... we can expect many, many more. DSL -> asm on each can get a bit tiresome.
Many apps can benefit from running in more than one place. For instance, I scaled out an authoritative game server using OpenCL recently. Because I used OpenCL, I could run it on Amazon GPGPU instances as well as locally on the server here. Two different sets of cards... same codebase... only difference was instead of 100's of thousands of users on the local server, you can support millions on Amazon. There is something to be said for that sort of flexibility.
Couple that with a clustered vert.x event bus, and you begin to see the power such a system might bring... and that's just for a trivial application like gaming!!!
Imagine the benefits accrued to other, more complex, applications!
You should think carefully prior to being dismissive of hardware agnosticism. If you want to tinker and determine what is possible with this particular platform, by all means, use platform specific tools. However, if you want to bring the power of parallel processing to bear in solving problems wherever you find them... thinking about hardware agnosticism really is a "must-do" as my daughter would say.
"I'm really disappointed about how shallow the discussions about Adapteva are, and have been, on HN. To remind everyone, the H = hacker."
Thank You for saying this, i wanted to write about this but never found the time. I have started reading HN less and less because there is no longer substance in the comments and they usually focus on something that makes up 10% of the article, i actually find it weird at times. I am depending more and more on the weekly newsletters but still miss the old comments which were optimistic, on point and taught me something about the subject central to the article.
Back on topic. "What Adapteva has done is create a credit-card sized parallel-processing board" This is so cool,as a linux user I hope to get my hands on one of these asap! Take a look at the kickstarter video http://www.kickstarter.com/projects/adapteva/parallella-a-su...
When I was 13, I started to tinker around with electronics. I didn't really have a proper grasp of electronics except from electronics playsets at 8-10. I designed some circuits using the bits of digital logic knowledge I had, but they called for dozens of chips to implement simple tasks. Then, I stumbled across 8bit AVRs. The possibilities compared to my feeble steps around XOR gates and Flip Flop ICs...they put me in awe. So I started playing around with it, and tried to push bounds, optimize code, adressing, busses, multiplexing, etc. And then I found out about the 32 bit ARM Chips that came for a similar price to the AVRs. Again, the possibilities...And then CPLDs and FPGAs, Neuronal Network ICs, and so on. Every single time, this rush of excitement. I'm an addict, amn't I?
And the Adapteva is similar. From what it sounds like, you just have this brute power at your fingertips. I'll read into the specs a little bit, but it sounds frankly awe inspiring even before opening them up. Want to PWM control 500 leds individually? From what it sounds like in this article, the thing got power for double (off the top of my head). Want to create stereooptic 3d models using a camera and an IMU in real time? It sounds like it can do that (over the thumb calculation). Want to overlay your own 3d models into it and display them using the occulus 3d?
What I'm trying to get across is, if you're not as excited as if you found out santa is real, you're not excited enough.
EDIT: THERE'S A D*"§ FPGA ON THAT THING!!!! I'll stop datasheeting to avoid hyperventilation.
ask what future things having something like this on a SoC would enable.
I asked that and came up blank. And I haven't seen answers from anyone else, either. Has Adapteva themselves shown any examples where their chip beats a GPU?
I can think of two: documentation and simplicity.
Comparing Parallella with GPUs only in performance is missing the point. The board is open and quite understandable for non-experts like me. It's a platform for learning and experimenting, like a Raspberry Pi but more geeky. You will probably have an easier time tinkering with this and getting it to do useful things, that's the point.
I feel, like the parent commenter, quite excited about this.
In the comment thread on the article someone points out that the Adapteva chip doesn't do double precision floating-point, which limits its usefulness (to put it mildly). If the goal is to provide people with a low-cost platform to experiment with parallel programming, surely a decent NVidia card gives you less expensive (given you can plug it into a PCI slot and it will work) access to more CPUs that run faster and do more.
It took a long time for GPU's to get double precision floating point and plenty of GPGPU work was done with them prior to that, so it's not a deal breaker
Not sure if world first or AMD's first, but it was around this timeframe, 2007:
"AMD Delivers First Stream Processor with Double Precision Floating Point Technology"
http://phys.org/news113757140.html
I'm 32 or so years of programming, I've hardly ever done anything that needed, or used, floats. It may limit it's usefulness, but most of what people tend to want double precision for is incidentally also stuff that is easily vectorized, in which case a GPU will crush it anyway.
And a "decent NVidia card" doesn't allow me to combine arbitrary independent C programs to each individual core, and doesn't give me full low level guides for hardware access. It's a completely different beast.
Well, you can still do double-floats, combining two 32-bit floats for a greater precision. While that doesn't get you full double precision, it just might be enough. And of course you can extend the same idea to implement quad-floats and so on.
One interesting application could be realtime 3D rendering because this is an area with small overhead. I know that the chip does not support floating point but that could be simulated by fixed point integers.
I agree with Shamanmuni that the great advantage of Parallela chip over GPUs is open source (full documentation). It's a practical study tool for real parallel programming tasks that many students can afford.
"I fundamentally disagree that SoCs are different than desktop technology. They're just smaller. High-end architectures are already driven to be as power-efficient as possible, so when you cut them down they're still efficient. For example, Kabini is an "SoC" that has the same GCN CU as a "desktop" Kaveri or a discrete Radeon."
The Parallella doesn't seem inherently more appropriate for embedded devices; it just depends on your requirements. Kabini would be embarrassingly power-hungry in plenty of embedded applications, while the Parallella might be laughably slow in plenty of other embedded applications.
Don't forget, by the way, that "embedded" doesn't mean "battery".
You're nitpicking. I already gave a few examples of where Parallella would be a good fit. To remind you, let's revisit the OpenCV for robotics application. The Parallella is shaping up to be a great device for OpenCV applications, do you at least admit that?
I see, I am less confused now. You commented elsewhere on this page, and assume that we all have read those comments, though they are not in this chain right here.
You're approaching the question from a different angle. The key word is SoC. Think embedded performance, rather than desktop performance.
Just to give you a few examples... OpenCV for robotics platforms, cheap low-power SDR capable of transmission, SIP encryption and compression. One might argue you could stick a GPU in a robot, I'd personally want something better suited to the task (lower power).
I fundamentally disagree that SoCs are different than desktop technology. They're just smaller. High-end architectures are already driven to be as power-efficient as possible, so when you cut them down they're still efficient. For example, Kabini is an "SoC" that has the same GCN CU as a "desktop" Kaveri or a discrete Radeon.
This is wrong. For example, low-power embedded ARM chips are not simply cut-down high-end x86 chips. If you optimize for power usage instead of raw performance, there are many design decisions that come out differently, resulting in a design that is qualitatively different and not just "scaled down powerhorse".
ZenoArrow is talking about embedded SoCs though. While Kabini is a SoC, it isn't really suited for embedded applications. These chips usually have a ton of GPIO, built-in support for different communication protocols, analog to digital converters, a lower power draw, etc. etc.
Exactly. I'm very excited to get my board and break into it. It really is intended to be a testbed for multiprocessing and hacking.
One thing that I'd like to see is what other people do with this product. I think that really will be the best part of this board. I'd equate it to minecraft (if I may be so bold). They didn't create a computer in minecraft, they created the possibility to create a computer and that was enough. That's how I see this board.
My biggest question is what do I need to know to use this? How can I write things that take advantage of this massive parallelization? Is there any reading anyone would recommend? Or maybe some basic examples for writing GPU based parallel software?
I'm so stoked about this board! I've been really wanting to have a board to try out hybrid computing/HPC with for a long time now, but everything has been a bit beyond my reach/justification pricewise. I got so excited about this board reading about it. The sky is the limit with this hardware, and now it'll that much more available to everybody.
Thinking about everything I can do with this board is making my head explode!
I'm really happy that you clarified this for me. I was a bit confused because the newest KickStarter video focuses mainly on a young girl using the computer to surf the web and doesn't really detail anything that has been mentioned in these comments. After reading everything, it seems awesome though.
I'm actually thinking Adapteva has a lot of future in present areas of growth.
1) On the mobile side, you can have Epiphany, their compute fabric, as a unit directly on the mobile SoC. You can do codec offload, like WebP, WebM, SILK/Opus. You can do basic computer vision for augmented reality applications, or image recognition. Or perhaps physics, integrate gyro output, position the device in absolute three space. I dunno, the point is the compute is open, there for exploitation. It's not like OpenCL where I have to beg the drivers to be available, correct, or performant. Nor is it like Qualcomm's Hexagon, where who knows if I can use it, and I sure as hell won't without signing an NDA.
2) As far as cloud and heterogenous compute goes, again I see an embedded Epiphany being useful. Everybody whines about various things, like for example missing double-precision. Firstly, it's not like the architecture can't be extended in future. But more importantly they miss little details. Each node in Epiphany can branch and do integer. You can see it doing wire-speed protobuff de/coding and other parallel data shuffling of long-living data, that could be compressed, or interleaved somehow.
I'm more of a low-power, cloud kind of guy. So that's what I'll be playing with the most when I get my hands on the kit. That and maybe some parallel graph rewriting. Who knows, the sky's the limit.
I wish to pick one nit: This is not the first chipset to be fully documented and have this sort of massively-parallel structure. GreenArrays is producing hardware right now if you want to go play: http://www.greenarraychips.com/
Greenarrays eval board is $450, though. Parallella is $99 with everything. Parrallella's original intent was to fit in an Altoid tin, but it turns out rounded corners are expensive ;). Would have been a nice case, though.
AFAIK the GreenArray chip provides only 128 bytes per core while Parallela supports 32 KBytes per core.
As a former Forth hacker I was enthusiastic at the first glance of the GA but 128 Bytes per core were really disappointing. What could that amount of RAM be useful for?
Ok, since when is the ARM Cortex fully documented, and what depth does your comment add to this discussion? Your emotional appeal is more shallow than any other comment here! Throw in some programmer jargon and nostalgia, and a smiley and your comment is practically garbage. :)
To remind everyone, the H = hacker. This device is a godsend, as far as I'm concerned. For the first time ever I get fully documented access to compute array on chip. No the architecture wasn't designed for anything specific, like graphics, but that means I don't get bogged down in details I don't care about, like some obscure memory hierarchy.
The chip is plain, simple, low-power, and begging for people to have an imagination again. Stop asking what existing things you can do with it, ask what future things having something like this on a SoC would enable.
Also, you should really be thinking about the chip at the instruction level, writing toy DSL to asm compilers. Thinking along the lines of, oh yeah I'll use OpenCL so I can be hardware agnostic, is never going to allow you to see what can be possible with it. If you read the docs you'll see what a simple and regular design it is, perfect for writing your own simple tooling.
It's been a long time, but I feel like a kid again. Like when I first discovered assembly on my 8086. Finally a simple device I can tinker with, play, and wring performance out of.
Hallelujah! :)